Read The Computers of Star Trek for Free Online Page A

factor” on the x-axis, with “power usage in megajoules/cochrane” and “power usage approaches infinity” designated. We’re told that warp 10 is impossible because at warp 10, speed would be “infinite.” (Never mind that the original series’ ship sometimes exceeds warp 10. In “The Changeling” ( TOS ), the Enterprise hits warp 11.)
    So 3350 millicochranes = 3.35 cochranes = warp factor slightly above warp 1 (because 10 cochranes = warp factor 2). The implication is that the MSFGs allow internal processing of data within each main processing core to run significantly faster than lightspeed. Sorry, dear readers. Even if it meant something to say that a computer’s processing speed is faster than light, this is still implausible. Just because FTL travel is possible for starships, that doesn’t imply that machinery within an FTL field will operate at such speeds.

    FTL signal transmission presumably affects redundancy, since the three cores transfer information from one to another at warp velocity. Anyone accessing one of the three computer cores would find the exact same data on each. Feeding information into one core is the same as feeding it into all three. This scenario is hard to believe. In emergency situations, if either of the main processing cores in the primary hull fails, the other would assume total primary computing load for the ship without interruption. As would the processing core in the engineering hull used for backup. The information in each would be exactly the same. In other words, the linked computers would achieve 100 percent redundancy. But only if we accept the notion that they can “operate at FTL speeds.”
    If we don’t, then it’s impossible for the three computer cores to be 100 percent redundant. Though the machines might operate extremely fast, information transfer would still take nanoseconds or microseconds to complete. Not much time to us. But as we’ll discuss in the chapter on navigation and battle, the delay might prove crucial to a starship.

Core Elements
    T he main processing cores consist of individual processors, called core elements, that actually do the computing—running programs, interpreting and carrying out instructions, calculating addresses in memory, and so on. According to the manual, “core elements are based on FTL nanoprocessor units arranged into optical transtator clusters of 1,024 segments. In turn, clusters are grouped into processing modules composed of 256 clusters controlled by a bank of sixteen isolinear chips:” 4
    Let’s try to translate this into English. Taking what we know about the ship’s computer and combining it with the above description, we come up with Figure 2.4 .

    FIGURE 2.4 Core Elements

    Since the manual devotes just two sentences to core elements, we have to guess what an FTL nanoprocessor is, what an optical transtator cluster is, what the segments are, and what the sixteen isolinear chips do. Figure 2.4 shows the LCARS communicating with what we may call the controller through the miniature subspace field generators. The controller is the bank of sixteen isolinear chips. These chips may constitute a front-end parallel processing unit that interprets and consolidates commands and responses, and perhaps buffers data for faster transmission. (Though how data buffers can speed up transmission that’s already going faster than light is beyond our comprehension.) Again, it looks as if the architecture of the Enterprise computer is a mishmash of mainframe architecture, supercomputer architecture, and a fantasy of FTL circuitry coursing through gigantic metal machinery.
    Let’s continue with the transmission of commands, responses, and data from the controller to and from the processing modules. We’re told that each processing module has 256 optical transtator clusters, each containing 1,024 FTL nanoprocessor units.
    Multiplying these numbers